1. Field of the Invention
This invention relates to integrated circuit (IC) chips including a handle wafer support. More particularly, this invention relates to an improved technique and chip structure for fixing the potential of the handle wafer at a desired level.
2. Description of the Prior Art
Integrated circuits often are formed in a semiconductive silicon substrate having device regions (or "tubs") for corresponding elements of the circuit, both active and passive. Such device regions generally are electrically isolated from one another as by means of dielectric isolation (DI). The section of the silicon substrate containing the device regions can be pictured as a horizontal slice, and commonly is provided at its lower surface with an insulative layer ("buried oxide"). Such composite structure is often referred to as silicon-on-insulation (SOI). The insulative layer is, in turn, frequently supported on a section or slice of the substrate referred to as the handle wafer. The handle wafer generally is made of silicon and among other things serves to hold the isolated device tubs in fixed positions with respect to each other.
One feature of dielectric isolation is that the silicon regions surrounding the isolation regions (either device tubs or the handle wafer) can electrically couple to each other through the isolation in such a way that the operation of devices in the device regions can be modified. Furthermore, in the absence of any current path to ground, it is possible for charge to accumulate in the handle wafer, eventually leading to electrostatic damage to the isolation regions. Accordingly, it is desired to provide means for controlling the potential and accumulated charge in the handle wafer, as by means of an electrical connection to the handle wafer section.
In conventional SOI wafer processing, such connection to the handle wafer is not readily made with the normal contact formation processes that are used with circuit elements fabricated on a substrate because the handle wafer is buried beneath the device regions in all parts of the substrate, and therefore not reachable from above. It is of course possible to gain access to the handle wafer from above by arranging the handle wafer to surround the device tubs on three sides, with the upper surface of the handle wafer being coplanar with the surface of the adjacent device regions. However, although this makes it possible to use conventional contact-making processes to establish connection to the handle wafer, such an arrangement is unsatisfactory because it requires that the handle wafer surface be in some places alongside of the upper surfaces of the device regions, and this restriction interferes with achieving other important goals.